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Cache memory
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#	Item
781	5th IEEE Wkshp. on Mobile Computing Systems and Applications (WMCSA), Monterey, CA, Oct[removed]Energy Efficiency through Burstiness Athanasios E. Papathanasiou and Michael L. Scott University of Rochester, Computer Scienc Add to Reading List Source URL: www.cs.rochester.edu Language: English - Date: 2011-04-01 00:08:33 Memory management Non-volatile memory Paging Virtual memory Cache Hard disk drive Page cache CPU cache Sleep mode Computer hardware Computer memory Computing
782	DISC[removed]Conflict Detection and Validation Strategies for Software Transactional Memory? Michael F. Spear, Virendra J. Marathe, William N. Scherer III, and Michael L. Scott Department of Computer Science Add to Reading List Source URL: www.cs.rochester.edu Language: English - Date: 2011-04-01 10:36:28 Information Concurrency control Software transactional memory Isolation Schedule Linearizability Extensible Storage Engine CPU cache Nested transaction Transaction processing Data management Data
783	Hardware Acceleration of Software Transactional Memory ∗ Arrvindh Shriraman Virendra J. Marathe Sandhya Dwarkadas Michael L. Scott David Eisenstat Add to Reading List Source URL: www.cs.rochester.edu Language: English - Date: 2006-05-18 20:56:53 Data Concurrency control Computer memory Cache coherency Software transactional memory Transactional memory MESI protocol Schedule Linearizability Transaction processing Computing Data management
784	Tech. Rep[removed]Using Simple Page Placement Policies to Reduce the Cost of Cache Fills in Coherent Shared-Memory Systems Michael Marchetti, Leonidas Kontothanassis, Ricardo Bianchini, and Michael L. Scott Add to Reading List Source URL: www.cs.rochester.edu Language: English - Date: 2011-03-27 21:03:45 Parallel computing Central processing unit Computer memory Cache CPU cache Non-Uniform Memory Access Shared memory Page Translation lookaside buffer Computing Concurrent computing Computer hardware
785	9th Intl. Wkshp. on Future Trends of Distributed Computing Systems (FTDCS), San Juan, PR, May 2003 Distributed Shared State (position paper) ∗ Michael L. Scott, Add to Reading List Source URL: www.cs.rochester.edu Language: English - Date: 2011-03-31 23:59:27 Inter-process communication Distributed computing architecture Database management systems Distributed shared memory Consistency model Cache coherence Memory coherence Shared memory Message passing Computing Concurrent computing Parallel computing
786	Incorporating Memory Management into User-Level Network Interfaces Matt Welsh, Anindya Basu, Thorsten von Eicken Department of Computer Science Cornell University User-level network interfaces allow applications direct a Add to Reading List Source URL: www.eecs.harvard.edu Language: English - Date: 2003-03-27 14:17:09 Central processing unit Computer memory Virtual memory Translation lookaside buffer Page CPU cache Thread Direct memory access Kernel Computer hardware Computer architecture Computing
787	Beyond S-DSM: Shared State for Distributed Systems ∗ DeQing Chen, Chunqiang Tang, Xiangchuan Chen, Sandhya Dwarkadas, and Michael L. Scott Technical Report #744 Computer Science Department, University of Rochester {luk Add to Reading List Source URL: www.cs.rochester.edu Language: English - Date: 2001-05-07 15:29:14 Pointer Transmission Control Protocol Extensible Storage Engine Relocation Memory address Cache coherence Virtual memory Cache Computing Computer programming Computer memory
788	URCS Tech. Rep. 699, Jan[removed]Comparative Evaluation of Fine- and Coarse-Grain Approaches for Software Distributed Shared Memory 1 Sandhya Dwarkadas1 , Kourosh Gharachorloo2 , Leonidas Kontothanassis3 , Daniel J. Scale Add to Reading List Source URL: www.cs.rochester.edu Language: English - Date: 2011-03-31 23:20:41 Distributed shared memory Multi-core processor Scalability Lock Cache coherence Shared memory Non-Uniform Memory Access Concurrent computing Computing Parallel computing
789	papathan-sosp03-poster.ppt Add to Reading List Source URL: www.cs.rochester.edu Language: English - Date: 2011-04-01 00:43:56 Cache Computer memory Fasterfox
790	ASPLOS[removed]Architecture Support for Data Isolation & Memory Monitoring Arrvindh Shriraman, Sandhya Dwarkadas, and Michael L. Scott Department of Computer Science, University of Rochester Add to Reading List Source URL: www.cs.rochester.edu Language: English - Date: 2011-04-01 17:28:51 Computer hardware Concurrent computing Concurrency control Transaction processing Central processing unit CPU cache Cache Transactional memory MESI protocol Computing Computer memory Cache coherency

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